Semiconductor memory devices have become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Flash memory is among the most popular non-volatile semiconductor memories.
Some non-volatile memory devices are used to store two ranges of charges and, therefore, the memory cells can be programmed/erased between two data states: an erased state and a programmed state (corresponding to data “1” and data “0”). Such a device is referred to as a binary device or a single-level cell (SLC) and the data is binary data.
A multi-state flash memory cell (storing multi-state data) is implemented by identifying multiple, distinct allowed threshold voltage ranges (ie data states). Each distinct threshold voltage range corresponds to a predetermined value for the set of data bits. For example, some memory cells can store two bits, and others can store three bits. The specific relationship between the data programmed into the memory cell and the threshold voltage ranges (also called data states) of the memory cell depends upon the data encoding scheme adopted for the memory cells. For example, U.S. Pat. No. 6,222,762 and U.S. Patent Application Publication No. 2004/0255090, both describe various data encoding schemes for multi-state flash memory cells.
In addition to the gains in capacity resulting from multi-state memory architectures, consumers have seen significant advantages as a result of a history of steadily scaling down the physical dimensions of memory cells. Smaller memory cells can be packed more densely on a given die area, allowing the user to access more memory capacity for the same price as an older memory technology. In order to achieve the advantage of higher memory capacity for a fixed die size, these smaller memory cells must be packed more closely together. Doing so, however, may result in a greater number of operational errors, such as errors when programming data to the memory and/or reading back user data from the memory. The errors may result in increased processing times to recover the data, or in some instances a corruption of data that has been stored.
Once a non-volatile storage element has been programmed, it is important that its programming state can be read back with a high degree of reliability. However, the programming state that is read can sometimes vary from the intended programming state due to factors including noise and the tendency of devices to gravitate towards charge neutrality over time.
Consequently, it is common for to encounter erroneous or corrupted data bits at the time of reading non-volatile memory. Typically, some form of error correction control (ECC) is applied to correct erroneous or corrupted data. One common control stores additional parity bits to set the parity of a group of data bits to a required logical value when the data is written. The informational and parity bits form an encoded word stored during the write process. The ECC decodes the bits by computing the parity of the group of bits when reading the data to detect any corrupted or erroneous data. Despite these considerations, there remains a need for improved memory operations in non-volatile memory.